Verilog Hdl Synthesis: A Practical Primer

Verilog Hdl Synthesis: A Practical Primer by Bhasker, J.. paperback edition. ISBN: 9780965039154.

With this book, you can: - Start writing synthesizable Verilog models quickly. - See what constructs are supported for synthesis and how these map to hardware so that you can get the desired logic. - Learn techniques to help avoid having functional mismatches. - Immediately start using many of the models for commonly used hardware elements described for your own use or modify these for your own application.